SIP Graduate Trainee Technical

The Programme

The graduate intern will work within Chipset Silicon Group USB Soft IP team, which develops USB Soft IPs for the latest Intel Chipset and SoC products. 
 
The responsibilities include but not limited to:

• Validating the functionality of new architectural features of next generations USB IP by developing test plans, test contents, coverage points or test tools. 
• Finding and implementing correct measures for failing tests. 
• Developing testbench infrastructure (monitors, scoreboards/checks, BFMs, etc.) to close on validation coverage. 
• Developing automated tools or script for the pre-silicon validation environment. 
• Working with a subset of Validation team to deliver comprehensive validation for a specific domain/area.

Required Skills and Abilities

The applicant should have a Bachelor's degree in Electrical and Electronics or Computer or equivalent Engineering or higher. 
 
Preferred skills:

• Exposure to digital logic design with Verilog/VHDL is a strong plus. 
• Experience in object-oriented programming, such as C/C++/Perl/Python is a strong plus. 
• Passionate about analyzing, debugging and problem solving. 
• Good communication skills and able to work in a diverse team. 
• Positive energy and highly motivated to learn and adapt to fast-evolving IP technologies and environments.

Inside this Business Group: 
 
In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.   
 
DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner. 
 
Working Model - This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.