What you will do
- Creates bottomsup elements of chip design including but not limited to FET, cell, and blocklevel custom layouts, abstract view generation and schematic layout verification and debug using phases of physical design development including customer polygon editing, floor planning and verification.
- Troubleshoots a wide variety up to and including difficult design issues and applied proactive intervention.
- Executes and verifies complex chips development and execution of project methodologies and/or flow developments.
- Requires expansive knowledge and practical application of methodologies and physical design
Required Skills and Abilities
- Bachelor Degree in Electrical and Electronics Engineering.
- Strong technical knowledge in VLSI Design.
- Familiarity with Cadence Virtuoso platform and Synopsys IC validator will be an added advantage
- Can work independently with minimum supervision.
Closing in 14 days
- Job Type:Graduate jobs
- Position Type:Full time
- Closing Date:31st July 2018, 6:00 pm
Enter an employer or university you want to find in our search bar.