Employer Navigation

CPU-SoC Silicon Design Engineering Intern profile banner profile banner

CPU-SoC Silicon Design Engineering Intern

The Programme 

When you work for a company, you should know that your employer is investing in you and that it is doing work you can be proud of. That's why we want to help you grow and make a positive impact on the world. Discover how you could be making a difference at Intel. 

Life At Intel 

Come build the future with us. We develop technologies that break barriers and enable tomorrow's greatest scientific and cultural wonders. Take a closer look at what we do and the extraordinary ways people use Intel technologies and solutions to create, innovate, and better the world around us. 

A chance to work at the leading edge of technology 

You know that we are a silicon technology company, but you may not know about the breadth of our innovation. We are expanding the boundaries in Data Centers, AI, Automated Vehicles, Memory, Software and much, much more. We want you to dream big and help us take on some of the biggest technical challenges in the industry. 

World class perks and benefits 

Ours is a culture that encourages our employees to both live and work at their best. Bonuses, generous time off, paid sabbaticals, stock options and perks such as on site fitness centers, private transportation and continuing learning opportunities culminate in a workplace where we can thrive together. 

What You Will Do 

Job Description 

In this position, you will be involving in the training, design and development of next generation SOC/CPU for wide range of Intel products and Internet of Things.  

Your responsibilities will include one or some of the following but not limited to: 

  • Assist design unit owner in Register Transfer Level RTL model functional validation. Use CAD tool extensively to simulate logic behavior and circuit performance and direction of physical design for next generation, deep sub-micron embedded circuit solutions. Verify the circuit behavior against the original simulation model and first silicon. 
  • Define VLSI Structural Design methodology and developing design flows. Implement structural physical designs, such as synthesis, floor planning, power-grid and clock tree designs, timing budgeting and closure, place and route, RC-extraction and integration.  
  • Verify structural physical designs, such as functional equivalency, timing/performance, noise, layout design rules, reliability and power.-Develop Analog IP on next generation deep submicron process for the Intel's SOC, perform tasks related to Very-large-scale integration VLSI complementary metal-oxide-semiconductor CMOS IC design, Solid state physics and physical layout.  

Such tasks may include:  

  • Circuit design of high speed clocking related circuits [phase-locked loop PLL, delay-locked loop DLL, bandgap] or high voltage input/output IO [double data rate DDR/LPDDR, General-purpose input/output GPIO, OPIO]. 
  • Responsible for Integration of Third party IPs -- Synthesis, functional and/or timing convergence, and pre and post-si debug of IPs developed by various external vendors as well as within the company.  
  • Handling of signals crossing power planes and clock domains, industry standard protocols including hardware and software details dealing with Memory LPDDR, storage eMMC, SATA, UFS, peripherals PCIe, USB, and MIPI interfaces in SOC devices.  
  • System integration dealing with Si/ Platform/ FW/ MW/ drivers/ OS/ Apps on Android and Windows-based tablets and phones. 
  • Responsible to validate and integrate third party IPs ensuring they meet product specification and functionality before they are productized into physical chip.  
  • Required to work very closely with design teams and architects to implement the low-level RTL design to ensure overall good functionality of the chip.  
  • Develop specific test environment/platform, validation methodology and test plan to validate SOC design by identifying and exercising boundary conditions and special cases in an effort to break the chip to find that last elusive bug. 
  • Oversees definition, design, verification, and documentation for SoC System on a Chip development.  
  • Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation.  
  • Performs Logic design for integration of cell libraries, functional units and sub-systems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs.  
  • Contributes to the development of multidimensional designs involving the layout of complex integrated circuits.  
  • Performs all aspects of the SoC design flow from high-level design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing.  
  • Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results.  
  • May also review vendor capability to support development. 

Required Skills and Abilities 

Qualifications 

  • You must possess the below minimum qualifications to be initially considered for this position: 
  • Students pursuing a Bachelor degree in EECS or related major with good CGPA 
  • Good communication skills and proficient in English 
  • Knowledge on Unix, VLSI Design, SOC/PC Architecture, System Verilog is major plus 

Inside this Business Group 

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner. 

Work Model for this Role 

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. 

Closed a month ago
Closed a month ago
  • Job type:Internships
  • Disciplines:

    Computer Science, Engineering Electrical

  • Citizenships:

  • Locations:

    Kuala Lumpur

  • Closing Date:13th May 2022, 6:00 pm

Search

Enter an employer or university you want to find in our search bar.